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.Management Sciences
Category: Digital Electronics
Which mechanism allocates the binary value to the states in order to reduce the cost of the combinational circuits ?
A. State Reduction
B. State Minimization
C. State Assignment
D. State Evaluation
In case of OR gate, no matter what the number of inputs, a____________________?
A. 1 at any input causes the output to be at logic 1
B. 1 at any input causes the output to be at logic 0
C. 0 any input causes the output to be at logic 0
D. 0 at any input causes the output to be at logic 1
Assuming 8 bits for data, 1 bit for parity, I start bit and 2 stop bits, the number of characters that 1200 BPS communication line can transmit is__________________?
A. 10 CPS
B. 120 CPS
C. 12CPS
D. None of the above
An OR gate has 6 inputs. The number of input words in its truth table are________________?
A. 6
B. 32
C. 64
D. 128
A NAND gate is called a universal logic element because______________?
A. it is used by everybody
B. any logic function can be realized by NAND gates alone
C. all the minization techniques are applicable for optimum NAND gate realization
D. many digital computers use NAND gates
Most of the digital computers do not have floating point hardware because_____________?
A. floating point hardware is costly
B. it is slower than software
C. it is not possible to perform floating point addition by hardware
D. of no specific reason.
A debouncing circuit is________________?
A. an astable MV
B. a bistable MV
C. a latch
D. a monostable MV
The inputs of a NAND gate are connected together. The resulting circuit is _______________?
A. OR gate
B. AND gate
C. NOT gate
D. None of the above
What is/are the configurable functions of each and every IOBs connected around the FPGA device from the operational point of view ?
A. Input operation
B. Tristate output operation
C. Bi-directional I/O pin access
D. All of the above
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